1. Field of the Invention
The present invention relates to a low voltage detecting circuit of an ADSL modem, and more specifically, to a dying gasp circuit for generating a signal when the input power of the modem drops below a predetermined voltage.
2. Description of the Prior Art
A low voltage detecting circuit is used in DSL modems to detect an input power voltage level. More specifically, the low voltage detecting circuit is used for detecting input voltage to generate a low active signal to be sent to a DMT (Discrete Multi-tone) chip in the DSL modem when the input voltage falls below a threshold level. The ADSL modem will inform the central office to ask for disconnection, and the service is then terminated.
Please refer to FIG. 1. FIG. 1 is a low voltage detecting circuit 10 of an ADSL modem according to the prior art. The low voltage detecting circuit 10 comprises a comparator 24 for detecting sufficient input voltage. Non-inverting and inverting input terminals of the comparator 24 are connected to node 16 and node 12, respectively. The low voltage detecting circuit 10 is fed by three voltage sources, which include an input voltage source Vinp and two reference voltage sources Vref1 and Vref2. Resistors R1 and R2 form a voltage divider between the reference voltage source Vref1 and ground, and provide a threshold voltage to the inverting input terminal of the comparator 24 at node 12. Likewise resistors R3, R4 and R7, R8 form a voltage divider between the input voltage source Vinp and ground, and provide a fraction of the input voltage to the non-inverting input terminal of the comparator 24 at node 16. An output terminal of the comparator 24 is connected to a discrete multi-tone (DMT) chip 22 at node 20.
The low voltage detecting circuit 10 performs a simple function. The comparator 24 is used to compare the threshold voltage at node 12 to the fraction of the input voltage from input voltage source Vinp at node 16. If the input voltage drops, such that voltage at node 16 is less than the threshold voltage at node 12, then the comparator 24 outputs a low voltage signal at node 20. When the DMT chip 22 receives this low voltage signal at node 20, it sends the information to the central office (CO) and the ADSL modem will then be disconnected.
Although simple in function, the low voltage detecting circuit 10 uses the comparator 24 to generate the low voltage signal that is used to request disconnection of the ADSL modem. The comparator 24 is a complicated circuit that takes many logic gates to realize. Thus, the use of the comparator 24 adds size and expense of the low voltage detecting circuit 10.
It is therefore a primary objective of the claimed invention to provide a low voltage detecting circuit that uses two transistors instead of a comparator for detecting a drop of an input power voltage of a modem below a predetermined voltage.
According to the claimed invention, a low voltage detecting circuit comprises a first transistor having a first electrode electrically coupled to a reference voltage, a control electrode electrically coupled to the input power voltage, and a second electrode. The low voltage detecting circuit also has a second transistor having a first electrode electrically coupled to a logic high voltage, a control electrode electrically coupled to the second electrode of the first transistor, and a second electrode electrically coupled to a logic low voltage. When the input power voltage drops below the predetermined voltage, the voltage at the control electrode of the first transistor drops below the reference voltage to turn on the first transistor and consequently the second transistor so that a logic low signal is output from the first electrode of the second transistor.
It is an advantage of the claimed invention that the low voltage detecting circuit uses two transistors instead of a comparator in order to make the low voltage detecting circuit smaller and less expensive.